9 Hardware Interrupts and Traps

In the PDP11 computer, as in many other computers, there is an “interrupt” mechanism, which allows the controllers of peripheral devices (which are devices external to the CPU) to interrupt the CPU at appropriate times, with requests for operating system service.

The same mechanism has been usefully and conveniently applied to “traps” which are events internal to the CPU, which relate to hardware and software errors, and to requests for service from user programs.